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The General Director of Intel Pat Gelsinger organized the
global "Intel accelerated" last night last night. There are numerous
outstanding aspects of the event for discussion, and in our title you can see
that Intel announced plans for the new name of the node name, together using
the route map to 2025+. Other interesting titbacks were on topics; Two new
process technologies (RivBonfet and PowerVIA), a manual declared in 3D
packaging (Omni Fover and Fover Rights Direct), and the Progress News for Intel
Foundry Services (IFS) with Qualcomm is announced as the first important
client.
No later than ADO, consider a new roadmap built above (click
to enlarge). To the left, you can see where Intel is now, with pieces of
surfaces of 10 nm, created by the mass. In his recent income statement, he said
that its volume of 10 nm exceeded 14 nm to the above, so correctly present the
current state with this node.
Superfine Intel improved 10 Nm was going to come on, and the
processors that were going to use this process were the first lake chips of
lakes for laptops and desktop computers. Now Alder Lake-P and -s chips will be
described as Intel 7 'processors. If you follow the table, you will see that
Intel confirms that Intel 7 will deliver a profit of 15-15 percent Perf /
Watts, optimizing Fayer transistors and already in volume.
Intel admits a change chart with semiconductor quotes / scientific media
It is allowed further to the future in the future, Intel 4
(previously Intel 7NM) will be delivered by 20% predicted performance / watt,
hold full use of EUV, and the first METEORE lake for customer processors is
already recorded. Intel 3 continues with greater density, increased EUV use,
decreases through resistance, and can count on Intel 3 products arising during
or after H2 2023.
The latter, but no less important, in this road map Intel
awaits innovations on the basis of the Intel 20A process on H1 2024.
"A" means the entrance to the Angstrom Epoch, and if it continued on
the XNM route, I continued it would be called 2 nm. In the presentation of the
video, we have heard that Intel already has engineers who work in processors
18a for 2025.
Another important thing happens when Intel reaches the
Angstrom era. Transistor innovation, such as Ribbonfet and PowerVia, must enter
the game. Transistor innovations are much more involved than making smaller
nodes, chip designers and foundries can use other technology for higher
densities and other optimizations. Rigbonfet is the first new Intel Transistory
technology from Fager, and its nanorbal structure has a door wrapped around the
channel. Intel says that this allows you to increase the drive current in all
stresses for greater performance. PowerVIA is the implementation of the Intel
delivering the rear energy, optimizing the transmission of the signal by
eliminating the need for energy routing on the front panel of the Wafers.
You probably have already heard about Intel Foveros packaging technology. Now Intel has advanced it with Omni Fover and Direct Fover. Foveros Omni "allows the disaggregation to die, mixing several tabs more than dies with several basic tiles through mixed stunning nodes." Meanwhile, direct accompaniment allows the tones of sub-10-micron stroke and claims that the limit between where the wafs end and where the package begins.
In addition to the previous technical news, Intel shared
some of his recent business success from IFS. Qualcomm was registered in Fab,
some of its future processor families in Intel 20A, which sounds like a great
victory. Amazon AWS will use IFS for some of your duties on the servers chip
packages.